- Timestamp:
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Jun 20, 2007, 11:12:01 PM (15 years ago)
- Author:
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oetiker
- Comment:
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Added ARM information
Legend:
- Unmodified
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- Removed
- Modified
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v11
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v12
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7 | 7 | The downside of this is, that data can in general not be accessed from two different HW/OS combinations. |
8 | 8 | |
9 | | There are some provisions in RRD to detect such cross architecture access. But detection is not perfect. Some combinations are bound to even almost work. SPARC to PPC only differs in the representation of NANs. |
| 9 | There are some provisions in RRD to detect such cross architecture access. But detection is not perfect. Some combinations are bound to even almost work. Most CPUS only |
| 10 | differ in their representation of NANs. |
10 | 11 | |
11 | 12 | == Figuring 64bit Floating Point Numbers == |
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121 | 122 | }}} |
122 | 123 | |
| 124 | ARMv4l |
| 125 | {{{ |
| 126 | 0.000000e+00 -> 00 00 00 00 00 00 00 00 |
| 127 | 1.000000e+00 -> 00 00 f0 3f 00 00 00 00 |
| 128 | -1.000000e+00 -> 00 00 f0 bf 00 00 00 00 |
| 129 | nan -> ff ff ff ff ff ff ff ff |
| 130 | inf -> 00 00 f0 7f 00 00 00 00 |
| 131 | -inf -> 00 00 f0 ff 00 00 00 00 |
| 132 | 2.000000e+00 -> 00 00 00 40 00 00 00 00 |
| 133 | 4.000000e+00 -> 00 00 10 40 00 00 00 00 |
| 134 | 8.000000e+00 -> 00 00 20 40 00 00 00 00 |
| 135 | 1.600000e+01 -> 00 00 30 40 00 00 00 00 |
| 136 | 8.642135e+130 -> 43 2b 1f 5b 2f 25 c0 c7 |
| 137 | }}} |
| 138 | |
123 | 139 | As you can see, there is not all that much difference between the architectures (it is all IEEE 754 after all). For one there is the endianess difference and then there are the SPARCs how seem to have their own idea regarding NANs. In any event, a converter between these formats is only a few defines away. |
124 | 140 | |
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132 | 148 | (((uint64_t)(A) & 0x000000000000ff00LL) << 40) | \ |
133 | 149 | (((uint64_t)(A) & 0x00000000000000ffLL) << 56)) |
134 | | #define |
| 150 | |
| 151 | #define intswap(A) ((((uint64_t)(A) & 0xffffffff00000000LL) >> 32) | \ |
| 152 | (((uint64_t)(A) & 0x00000000ffffffffLL) << 32)) |
| 153 | |
135 | 154 | #define sparc2x86(A) ((uint64_t)(A) == 0x7fffffffffffffffLL \ |
136 | 155 | ? 0x000000000000f87fLL \ |
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148 | 167 | ? 0x7ff4000000000000LL \ |
149 | 168 | : endianflip(A)) |
| 169 | |
| 170 | #define ppc2x86(A) endianflip(A) |
| 171 | |
| 172 | #define x862ppc(A) endianflip(A) |
| 173 | |
| 174 | #define arm2x86(A) ((uint64_t)(A) == 0xffffffffffffffffLL \ |
| 175 | ? 0x000000000000f87fLL \ |
| 176 | : intswap(A)) |
| 177 | |
| 178 | #define x862arm(A) ((uint64_t)(A) == 0x000000000000f87fLL \ |
| 179 | ? 0xffffffffffffffffLL \ |
| 180 | : intswap(A)) |
150 | 181 | |
151 | 182 | #define itanium2x86(A) ((uint64_t)(A) == 0x000000000000f8ffLL \ |
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157 | 188 | : A ) |
158 | 189 | |
159 | | #define ppc2x86(A) endianflip(A) |
160 | | |
161 | | #define x862ppc(A) endianflip(A) |
162 | 190 | }}} |
163 | 191 | |
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200 | 228 | |
201 | 229 | Based on this information a portable RRDtool data format that works at least on |
202 | | PPC, x86 and SPARC will be not all that difficult to design. |
203 | | |
204 | | Information on other architectures is welcome: Alpha, ARM, MIPS. |
| 230 | PPC, x86, Itanium, PARISC, ARM and SPARC will be not all that difficult to design. |
| 231 | |
| 232 | Information on other architectures is welcome: Alpha, MIPS. |
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